A digital IC, also sometimes called a digital-logic IC, operates using two discrete states: high (logic 1) and low (logic 0). Digital logic is discussed in previous topics. Digital ICs contain massive arrays of logic gates that perform Boolean operations at high speed.
A transistor-transistor logic (TTL) gate. In this gate, two NPN bipolar transistors are used. Note that one of the transistors has two emitters
In transistor-transistor logic (TTL), arrays of bipolar transistors, some with multiple emitters, operate on dc pulses. This technology has several variants, some of which date back to around 1970. A basic TTL gate is illustrated in above figure. This gate uses two NPN bipolar transistors, one of which is a dual-emitter device. The transistors are always either completely cut off, or else completely saturated. Because of this, TTL is relatively immune to external noise.
An emitter-coupled logic (ECL) gate using four NPN bipolar transistors
Another bipolar-transistor logic form is known as emitter-coupled logic (ECL). In an ECL device, the transistors are not operated at saturation, as they are with TTL. This increases the speed. But noise pulses have a greater effect in ECL, because unsaturated transistors are sensitive to, and can actually amplify, external signals and noise. The schematic of above figure shows a basic ECL gate using four NPN bipolar transistors.
Digital ICs can also be constructed using metal-oxide-semiconductor (MOS) devices. N-channel MOS (NMOS) logic, pronounced “EN-moss logic,” offers simplicity of design, along with high operating speed. P-channel MOS logic, pronounced “PEA-moss logic,” is similar to NMOS logic, but the speed is slower. An NMOS or PMOS digital IC is like a circuit that uses only N-channel MOSFETs, or only P-channel MOSFETs, respectively. Complementary-metal-oxide-semiconductor (CMOS) logic, pronounced “SEA-moss logic,” employs both N-type and P-type silicon on a single chip. This is analogous to using both N-channel and P-channel MOSFETs in a circuit. The advantages of CMOS technology include extremely low current drain, high operating speed, and immunity to noise.
All forms of MOS logic ICs require care in handling to prevent destruction by electrostatic discharges. The precautions are the same as those that are required when handling MOSFETs. All technical personnel who work with the devices should be grounded. This can be achieved by having technicians wear metal wrist straps connected to a good electrical ground, and by ensuring that the relative humidity in the lab is not allowed to get too low. When MOS ICs are stored, the pins should be pushed into special conductive foam that is manufactured for that purpose.